This invention is generally related to the testing of manufactured, high speed digital electronic systems having unidirectional or bidirectional signaling.
The testing of manufactured digital electronic systems having high speed links plays an important role in delivering reliable products that operate using the state-of-the-art in high speed digital technology. Examples of typical systems that benefit from such testing and verification include, for instance, high end personal computers, server machines, and more specialized data communication components such as network routers and switches. The high speed links in such systems include for instance interchip communications involving unidirectional signal flow on one or more conductors in either a point-to-point interconnect or over a shared bus. Unidirectional signal flow means that at any given moment, there is a single signal propagating only in one direction on a particular conductive line that is connected between two chips. To increase the effective bandwidth per line, a bidirectional signaling scheme has been proposed where digital data is transmitted simultaneously in two directions over one conductive line. This is done by having two signals propagate simultaneously in opposite directions on the same line. The high speed digital signal being driven into the conductive line in both unidirectional and bidirectional schemes is composed of a sequence of pulses representing binary values (logical xe2x80x9c1xe2x80x9d or xe2x80x9c0xe2x80x9d).
As the rate of transmission of data and the amount of parallel data transmitted in the above described systems increases, the cost of designing and manufacturing fully functional systems increases dramatically. This is in part due to the difficulty in testing such high speed systems. The signals in such systems are driven at relatively low power levels in order to reduce the total power consumption of the system in which hundreds of such high speed signals may be propagating simultaneously in parallel. Typically, a probe may be applied to the interconnect lines, while the system is operating at its maximum intended speed, to pick up the digital signals and transfer them to high speed detection circuitry inside a logic analyzer or other test equipment for processing and display. However, unless the probe has extremely low capacitance, electrically loading the lines in this way may cause a distortion of the high speed digital signals that are propagating therein because of the low power levels and high frequencies at which the signals are being driven. As such, the line is not being tested while functioning as intended. For simultaneous bidirectional signaling, direct probing may not help identify the driven states, unless some mechanism is provided that can isolate the opposite traveling signals. Another technique requires that the system be xe2x80x9cslowedxe2x80x9d so that the main signals that propagate on the interconnect lines have sufficient time to settle given the greater loads presented by the probes. Once again, such a solution does not allow the high speed system to be evaluated at its maximum intended speed of operation. Another limited solution is to design built-in high speed detection and test circuitry into each receiving or transmitting chip of the system, and provide the output of such built-in circuitry to the logic analyzer. Such a solution, however, requires significantly greater on-chip area as well as additional pins to be added to the integrated circuit (IC) package containing the chip.
According to an embodiment of the invention, a method is disclosed that involves sensing a first crosstalk signal induced by a first digital signal. The first digital signal is being driven by a first logic agent into a signal line to communicate with a second logic agent. The second agent is coupled to receive the first digital signal from the signal line. The method further includes at least one of displaying and recording a logic waveform that represents the digital signal, based upon the crosstalk signal.